A high-level modeling system (HLMS) provides a high-level abstraction of low-level hardware components and intellectual property (IP) cores for an integrated circuit. These systems allow electronic designs to be described and simulated in a high-level modeling environment, which are then automatically translated into corresponding low-level hardware implementations. Unlike traditional hardware description language (HDL) based design approaches, users instantiate high-level modeling blocks and wire them up properly to construct the target system in a HLMS. Many HLMS design tools provide mechanisms such as automatic rate-and-type propagation, high-level resource estimation and timing analysis tools to facilitate the modeling process. One important advantage of a HLMS is that it offers a rich set of simulation and verification techniques integrated with the high-level abstraction.
According to conventional modeling systems, various blocks define the interfaces of an electronic design being modeled. For example, a “gateway in” block is translated into an input port of the design, while a “gateway out” block is translated into an output port. The “gateway in” block also specifies the data type conversion method and sampling frequency of the associated input signal. “Gateway in” blocks of conventional modeling systems only accept and produce scalar samples. This limitation forces the user to serialize multi-dimensional samples into scalar samples before feeding the samples into the “gateway in” block.
When a design under test (DUT) is compiled for hardware co-simulation, a hardware co-simulation block with the same interface is generated. On every simulation cycle, the hardware co-simulation block forwards a scalar sample to the corresponding input port of the DUT running in hardware. Each output port of the DUT produces a scalar sample, which is sent back to the hardware co-simulation block. This communication between the host and the hardware incurs significant overhead due to packetization, routing, synchronization, protocol, etc. Accordingly, conventional systems for simulating designs have significant limitations.